An interactive router for analog IC design
Proceedings of the conference on Design, automation and test in Europe
Measurements and Modelling of Delay Lines on Printed Circuit Boards
Measurements and Modelling of Delay Lines on Printed Circuit Boards
Routing of analog busses with parasitic symmetry
Proceedings of the 2005 international symposium on Physical design
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Algorithms for the length-compensation of bus geometries are presented. The algorithms are capable of automatically rerouting busses such that individual trace lengths are equalized, for an arbitrary number of traces, an arbitrary distribution of starting trace lengths, as well as arbitrary trace widths and intertrace spacings. Algorithms are also presented that allow the automatic adaptation to given space constraints and the observance of minimum structure sizes.