A novel framework for multilevel routing considering routability and performance
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
Detection of an antenna effect in VLSI designs
DFT '96 Proceedings of the 1996 Workshop on Defect and Fault-Tolerance in VLSI Systems
Fixing Antenna Problem by Dynamic Diode Dropping and Jumper Insertion
ISQED '00 Proceedings of the 1st International Symposium on Quality of Electronic Design
A Polynomial Time Optimal Diode Insertion/Routing Algorithm for Fixing Antenna Problem
Proceedings of the conference on Design, automation and test in Europe
Multilevel routing with antenna avoidance
Proceedings of the 2004 international symposium on Physical design
Coupling aware timing optimization and antenna avoidance in layer assignment
Proceedings of the 2005 international symposium on Physical design
An exact jumper insertion algorithm for antenna effect avoidance/fixing
Proceedings of the 42nd annual Design Automation Conference
Proceedings of the 2006 international symposium on Physical design
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As technology enters the nanometer territory, the antenna effect plays an important role in determining the yield and reliability of a VLSI circuit. Diode insertion and jumper insertion are the most effective techniques to fix the antenna effect. However, due to the increasing design complexity and the limited routing resource, applying diode or jumper insertion alone cannot achieve a high antenna fixing rate. In this paper, we give a polynomial-time antenna violation detection/fixing algorithm by simultaneous diode/jumper insertion with minimum cost, based on a minimum-cost networkflow formulation. Experimental results show that our algorithm consistently achieves much higher antenna fixing rates than the state-of-the-art jumper insertion and diode insertion algorithms alone.