Power Analysis Resistant AES Implementation with Instruction Set Extensions
CHES '07 Proceedings of the 9th international workshop on Cryptographic Hardware and Embedded Systems
Light-Weight Instruction Set Extensions for Bit-Sliced Cryptography
CHES '08 Proceeding sof the 10th international workshop on Cryptographic Hardware and Embedded Systems
Boosting AES performance on a tiny processor core
CT-RSA'08 Proceedings of the 2008 The Cryptopgraphers' Track at the RSA conference on Topics in cryptology
Proceedings of the ACM SIGCOMM 2010 conference
Fast software implementation of AES-CCM on multiprocessors
ICA3PP'11 Proceedings of the 11th international conference on Algorithms and architectures for parallel processing - Volume Part II
Fine tuning the advanced encryption standard (AES)
Proceedings of the Fifth International Conference on Security of Information and Networks
RFIDSec'12 Proceedings of the 8th international conference on Radio Frequency Identification: security and privacy issues
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Efficient implementation of block ciphers is critical towards achieving both high security and high-speed processing. Numerous block ciphers, including the Advanced Encryption Standard (AES), have been proposed and implemented, using a wide and varied range of functional operations. Existing microprocessor architectures do not provide this broad range of support. However, the advent of intellectual property (IP) processor cores presents the opportunity to augment existing datapaths with instruction set extensions to add acceleration modules in the form of new instructions. We will present a general purpose instruction set extension to a 32-bit SPARC V8 compatible processor core that accelerates the performance of Galois Field fixed field constant multiplication, a core element of the AES algorithm. This extension will be shown to accelerate AES encryption versus pure software implementations at a small hardware cost. This matches the improvement demonstrated in previously proposed AES-specific instruction set extensions while maintaining a generalized implementation format capable of supporting other algorithms that use Galois Field fixed field constant multiplication.