Postplacement voltage assignment under performance constraints
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Post-floorplanning power/ground ring synthesis for multiple-supply-voltage designs
Proceedings of the 2009 international symposium on Physical design
Incremental improvement of voltage assignment
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Application-driven voltage-island partitioning for low-power system-on-chip design
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Voltage-drop aware analytical placement by global power spreading for mixed-size circuit designs
Proceedings of the 2009 International Conference on Computer-Aided Design
Floorplanning considering IR drop in multiple supply voltages island designs
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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Voltage island has become a very effective design style for power saving by assigning different supply voltages to different modules. However, the new design style also brings forward new challenges, especially to the designer of P/G networks. In this paper, we study the power delivery problem in voltage island designs, and propose to consider voltage drop during the floorplanning process to reduce design iterations. We have implemented a floorplanner supporting voltage islands with special considerations on power delivery integrity. Our analysis shows that it is unnecessary to consider the pitch of the P/G network in the floorplan stage. Using this strategy to guide our new floorplaner, we can get more robust low power design under almost the same run time. Experimental results have demonstrated the effectiveness of our approach.