Effects of Embedded Decompression and Compaction Architectures on Side-Channel Attack Resistance

  • Authors:
  • Chunsheng Liu;Yu Huang

  • Affiliations:
  • University of Nebraska-Lincoln, USA;Mentor Graphics, USA

  • Venue:
  • VTS '07 Proceedings of the 25th IEEE VLSI Test Symmposium
  • Year:
  • 2007

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Abstract

Attack resistance has been a critical concern for security-related applications. Various side-channel attacks can be launched to retrieve security information such as encryption key. Prior work does not consider the presence of embedded compression architectures and their impacts on security. In this paper, we analyze the complexity of side-channel attacking on designs with embedded decompression and compaction circuit. We first present a possible attacking strategy and perform analysis on the complexity of attacking circuits with EDT architecture. We then extend the probabilistic analysis to the more general compaction schemes using distance coding. We show that successful attacking of designs with embedded decompressor and compactor is extremely difficult. The complexity is much higher than the results shown in prior work assuming no decompression and compaction. It indicates that the use of embedded compression architectures can achieve higher security level.