Timing Analysis for Fixed-Priority Scheduling of Hard Real-Time Systems
IEEE Transactions on Software Engineering
Proceedings of the conference on Design, automation and test in Europe - Volume 2
A formal approach to fault tree synthesis for the analysis of distributed fault tolerant systems
Proceedings of the 5th ACM international conference on Embedded software
MODELS'12 Proceedings of the 15th international conference on Model Driven Engineering Languages and Systems
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Architecture design is a critical stage of the Electronics/Controls/Software (ECS) -based vehicle design flow. Traditional approaches relying on component-level design and analysis are no longer effective as they do not always allow for the quantitative evaluation of properties arising from the composition of subsystems. This paper presents a system level architecture design methodology that is supported by tools and methods for the quantitative evaluation of key metrics of interest related to timing, dependability and cost. An example of its application to a by-wire system case study is presented, and the challenges faced in its application in the context of the actual development process are discussed.