Area and speed oriented synthesis of FSMs for PAL-based CPLDs
Microprocessors & Microsystems
Sequential algorithm for low-power encoding internal states of finite state machines
Journal of Computer and Systems Sciences International
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In this paper we deal with the problem of the finite states machine's (FSM) state assignment. CMOS-based digital circuits dissipate a power only during a transition at the output. Therefore one of the methods of the power minimization is to reassign the FSM states. We discuss the methods such as column-based and annealing-based as well as propose the new method called sequential method. Experimental results showed that the proposed method is approximately 10% better than the other discussed algorithms.