A Self-Adaptive Extensible Embedded Processor

Authors:
Lars Bauer;Muhammad Shafique;Dirk Teufel;Jorg Henkel
Affiliations:
University of Karlsruhe, Germany;University of Karlsruhe, Germany;University of Karlsruhe, Germany;University of Karlsruhe, Germany
Venue:
SASO '07 Proceedings of the First International Conference on Self-Adaptive and Self-Organizing Systems
Year:
2007

Citing 0
Cited 7

RISPP: rotating instruction set processing platform

Proceedings of the 44th annual Design Automation Conference
Run-time system for an extensible embedded processor with dynamic instruction set

Proceedings of the conference on Design, automation and test in Europe
Efficient resource utilization for an extensible processor through dynamic instruction set adaptation

IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Coordinated management of hardware and software self-adaptivity

Journal of Systems Architecture: the EUROMICRO Journal
REMiS: run-time energy minimization scheme in a reconfigurable processor with dynamic power-gated instruction set

Proceedings of the 2009 International Conference on Computer-Aided Design
Optimizing the H.264/AVC Video Encoder Application Structure for Reconfigurable and Application-Specific Platforms

Journal of Signal Processing Systems
Selective instruction set muting for energy-aware adaptive processors

Proceedings of the International Conference on Computer-Aided Design

Quantified Score

Hi-index	0.00

Visualization

Abstract

Extensible embedded processors allow the designer to adapt the instruction set to a certain application profile. It is ei-ther done during design time or at run time. In the latter case it is fixed when which part of the instruction set is used. The processor is then configured according to a pre-defined schedule. Our approach goes a step further: our ex-tensible processor is self-adaptive. That means, during run time the processor analyzes the usage of Special Instruc-tions and self-adapts when and how these are used and con-figured. We show that this kind of self-adaptation leads to a high efficiency (e.g. performance per chip area, etc.) and is superior to state-of-the-art extensible processors. In this paper we present the main techniques of our novel self-adaptive approach. We evaluate by means of an H.264 Video Encoder.