Simple eight bit, emulated computers for illustrating computer architecture concepts and providing a starting point for student designs

• Authors: Timothy D. Stanley;Thanh Quach Xuan;Leslie Fife;Don Colton
• Venue: ACE '07 Proceedings of the ninth Australasian conference on Computing education - Volume 66
• Year: 2007

Students learn better when they both hear and do. In computer architecture courses "doing" can be difficult in small schools without hardware labs hosted by computer engineering, electrical engineering, or similar departments. Software solutions exist. Our success with George Mills' Multimedia Logic (MML) is the focus of this paper. We have found that students learn and understand more, and experience less frustration, without the additional complexity of hardware details. MML provides a graphical computer architecture solution with convenient I/O support and the ability to build and emulate a variety of computer designs. It has proven highly motivational to upper-division computer science students designing and constructing emulated computers. Student projects resulted in excellent student understanding of the detailed inner workings of computers. Students also developed better teamwork skills and produced useful training aids for the lower-division computer organization class. Designs implemented include 8-bit and 16-bit, von Neumann and Harvard architectures, from single-cycle to twelve-cycle instructions. Issues resolved during the learning process include timing, initialization, instruction set architecture, I/O, and assembler design. We provide two demonstration computers used to illustrate to students a design approach and an expected outcome in their individual design activities. One example is an eight-bit Harvard architecture with eight instructions that execute in a single clock cycle. The second is an eight-bit von Neumann architecture that has four instructions and executes each instruction in three clock cycles. This paper describes these two example computers.