ASSET-2: Real-Time Motion Segmentation and Shape Tracking
IEEE Transactions on Pattern Analysis and Machine Intelligence
Implementation of single precision floating point square root on FPGAs
FCCM '97 Proceedings of the 5th IEEE Symposium on FPGA-Based Custom Computing Machines
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We have designed and implemented a system for real-time detection of 2-D image features on a reconfigurable computer based on Field Programmable Gate Arrays (FPGA's). We envision this device as the front-end of a system able to track image features in real-time vision applications like autonomous vehicle navigation and "structure from motion". The algorithm employed to select good features is inspired by the method of Tomasi and Kanade. Compared to the original method, the algorithm that we have devised does not require any floating point or transcendental operations, and maps efficiently into a highly pipelined architecture, well suited to be implemented in FPGA technology. We have implemented the algorithm on a low-cost reconfigurable computer equipped with video decoder and encoder interfaces. Reliable operation has been observed on an image stream generated by a standard NTSC commercial video camera at 30~Hz on different scenes and under different light conditions. This result compares favorably to the implementation of the same algorithm on a system based on the TI C80 DSP, able to process at most 5 frames/second.