Modeling the function cache for worst-case execution time analysis

  • Authors:
  • Raimund Kirner;Martin Schoeberl

  • Affiliations:
  • Technische Universitaet Wien, Austria;Technische Universitaet Wien, Austria

  • Venue:
  • Proceedings of the 44th annual Design Automation Conference
  • Year:
  • 2007

Quantified Score

Hi-index 0.00

Visualization

Abstract

Static worst-case execution time (WCET) analysis is done by modeling the hardware behavior. In this paper we describe a WCET analysis technique to analyze systems with function caches, a special kind of instruction cache that caches whole functions only. This cache was designed with the aim to be more predictable for the worst-case than existing instruction caches. Within this paper we developed a cache analysis technique for the function cache. One of the new concepts of this analysis technique is the local persistence analysis, which allows to precisely model the function cache.