Design of a digital FM demodulator based on a 2nd° order all-digital phase-locked loop

Authors:
Juan Pablo Martinez Brito;Sergio Bampi
Affiliations:
Federal University of Rio Grande do Sul - UFRGS, Porto Alegre, Brazil;Federal University of Rio Grande do Sul - UFRGS, Porto Alegre, Brazil
Venue:
Proceedings of the 20th annual conference on Integrated circuits and systems design
Year:
2007

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Abstract

A software-defined radio (SDR) is a wireless communication device in which all of the signal processing is implemented in software. By simply downloading a new program, a SDR is able to interoperate with different wireless protocols, incorporate new services, and upgrade to new standards. Therefore, FPGAs have been used extensively for implementing essential functions in SDR architectures. In this paper, we explore the design of a Digital FM Receiver using the approach of an All-Digital Phase Locked-Loop (ADPLL). The digital FM Receiver circuit is designed using pure VHDL, then simulated and synthesized using ModelSim SE 6 and Leonardo Spectrum Level 3, respectively. The final circuit operates at a frequency up to 150MHz and occupies the area around 15K logic gates.