A Completely Integrated Low Jitter CMOS PLL for Analog Front Ends in Systems on Chip Environment
ASP-DAC '02 Proceedings of the 2002 Asia and South Pacific Design Automation Conference
Design of a digital FM demodulator based on a 2nd° order all-digital phase-locked loop
Proceedings of the 20th annual conference on Integrated circuits and systems design
Design of a digital FM demodulator based on a 2nd-order all-digital phase-locked loop
Analog Integrated Circuits and Signal Processing
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From the Publisher:This is a contemporary reference work on phase-locked loops for wireless communications engineers. The coverage is comprehensive and includes summary chapters on the circuit theory needed to explain the theory and operation of phase-locked loops and the supporting mathematics necessary for analysis. These include concise discussions of Laplace Transformations, z-Transformations, root locus, Bode analysis, partial fraction expansion, and others.