FPGA infrastructure for the development of augmented reality applications

Authors:
Germano F. Guimarães;João P. S. M. Lima;João M. X. N. Teixeira;Guilherme D. Silva;Veronica Teichrieb;Judith Kelner
Affiliations:
Universidade Federal de Pernambuco(UFPE), Recife, Brazil;Universidade Federal de Pernambuco(UFPE), Recife, Brazil;Universidade Federal de Pernambuco(UFPE), Recife, Brazil;Universidade Federal de Pernambuco(UFPE), Recife, Brazil;Universidade Federal de Pernambuco(UFPE), Recife, Brazil;Universidade Federal de Pernambuco(UFPE), Recife, Brazil
Venue:
Proceedings of the 20th annual conference on Integrated circuits and systems design
Year:
2007

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Abstract

In this paper, we describe a platform that aims to help developers on the construction of embedded AR applications. The infrastructure is based on Field Programmable Gate Array and enables the creation of hardware based AR systems, contributing to high speed processing and low power consumption. In addition, the platform uses a componentized design model, where the steps needed to develop an AR application consist in combining the necessary components. A number of image processing algorithms have been implemented and some AR applications have been created using this infrastructure in order to demonstrate the platform capabilities. The performance obtained with the hardware version (at 100 MHz) of the algorithms has also been compared with their software counterparts (at 2 GHz).