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Compressed image file formats: JPEG, PNG, GIF, XBM, BMP
Hyperspectral Image Compression on Reconfigurable Platforms
FCCM '02 Proceedings of the 10th Annual IEEE Symposium on Field-Programmable Custom Computing Machines
Techniques and Mechanisms for Dynamic Reconfiguration in an Image Processor
Proceedings of the 15th symposium on Integrated circuits and systems design
Adaptive Image Filtering Using Run-Time Reconfiguration
IPDPS '03 Proceedings of the 17th International Symposium on Parallel and Distributed Processing
Fpga-based face detection system using Haar classifiers
Proceedings of the ACM/SIGDA international symposium on Field programmable gate arrays
Partially parallel architecture for AdaBoost-based detection with Haar-like features
IEEE Transactions on Circuits and Systems for Video Technology
Cascade boosting-based object detection from high-level description to hardware implementation
EURASIP Journal on Embedded Systems - Special issue on design and architectures for signal and image processing
Face detection in resource constrained wireless systems
Mobile Multimedia Processing
A novel low-power embedded object recognition system working at multi-frames per second
ACM Transactions on Embedded Computing Systems (TECS) - Special section on ESTIMedia'12, LCTES'11, rigorous embedded systems design, and multiprocessor system-on-chip for cyber-physical systems
Journal of Parallel and Distributed Computing
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This paper presents an FPGA-based system for detecting people from video. The system is designed to use JPEG-compressed frames from a network camera. Unlike previous approaches that use techniques such as background subtraction and motion detection, we use a machine-learning-based approach to train an accurate detector. We address the hardware design challenges involved in implementing such a detector, along with JPEG decompression, on an FPGA. We also present an algorithm that efficiently combines JPEG decompression with the detection process. This algorithm carries out the inverse DCT step of JPEG decompression only partially. Therefore, it is computationally more efficient and simpler to implement, and it takes up less space on the chip than the full inverse DCT algorithm. The system is demonstrated on an automated video surveillance application and the performance of both hardware and software implementations is analyzed. The results show that the system can detect people accurately at a rate of about 2.5 frames per second on a Virtex-II 2V1000 using a MicroBlaze processor running at 75 MHz, communicating with dedicated hardware over FSL links.