Digital image processing (2nd ed.)
Digital image processing (2nd ed.)
Neural Network-Based Face Detection
IEEE Transactions on Pattern Analysis and Machine Intelligence
Example-Based Learning for View-Based Human Face Detection
IEEE Transactions on Pattern Analysis and Machine Intelligence
Training Support Vector Machines: an Application to Face Detection
CVPR '97 Proceedings of the 1997 Conference on Computer Vision and Pattern Recognition (CVPR '97)
A General Framework for Object Detection
ICCV '98 Proceedings of the Sixth International Conference on Computer Vision
Robust Real-Time Face Detection
International Journal of Computer Vision
Intel Integrated Performance Primitives: How to Optimize Software Applications Using Intel IPP
Intel Integrated Performance Primitives: How to Optimize Software Applications Using Intel IPP
Detecting Pedestrians Using Patterns of Motion and Appearance
International Journal of Computer Vision
An Evaluation of the Suitability of FPGAs for Embedded Vision Systems
CVPR '05 Proceedings of the 2005 IEEE Computer Society Conference on Computer Vision and Pattern Recognition (CVPR'05) - Workshops - Volume 03
Computer Vision on FPGAs: Design Methodology and its Application to Gesture Recognition
CVPR '05 Proceedings of the 2005 IEEE Computer Society Conference on Computer Vision and Pattern Recognition (CVPR'05) - Workshops - Volume 03
Face detection for automatic exposure control in handheld camera
ICVS '06 Proceedings of the Fourth IEEE International Conference on Computer Vision Systems
A Parallel Architecture for Hardware Face Detection
ISVLSI '06 Proceedings of the IEEE Computer Society Annual Symposium on Emerging VLSI Technologies and Architectures
An FPGA-based people detection system
EURASIP Journal on Applied Signal Processing
PSIVT'06 Proceedings of the First Pacific Rim conference on Advances in Image and Video Technology
Hardware implementation of a cascade particle filter
ICIP'09 Proceedings of the 16th IEEE international conference on Image processing
Highly optimized implementation of OpenCV for the Cell Broadband Engine
Computer Vision and Image Understanding
A novel hardware architecture for rapid object detection based on adaboost algorithm
ISVC'10 Proceedings of the 6th international conference on Advances in visual computing - Volume Part III
Face detection system for SVGA source with hecto-scale frame rate on FPGA board
Microprocessors & Microsystems
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
A hardware architecture for real-time object detection using depth and edge information
ACM Transactions on Embedded Computing Systems (TECS)
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This paper proposes a hardware architecture for object detection based on an AdaBoost learning algorithm with Haarlike features as weak classifiers. We analyze and discuss the parallelism in this detection algorithm and propose a partially parallel execution model suitable for hardware implementation. This parallel execution model exploits the cascade structure of classifiers, in which classifiers located near the beginning of the cascade are used more frequently than subsequent classifiers. We assign more resources to these earlier classifiers to execute in parallel than to subsequent classifiers. This dramatically improves the total processing speed without a great increase in circuit area. Moreover, the partially parallel execution model achieves flexible processing performance by adjusting the balance of parallel processing. In addition, we implement the proposed architecture on a Virtex-5 FPGA to show that it achieves real-time object detection at 30 fps on VGA video without candidate extraction.