From Few to Many: Illumination Cone Models for Face Recognition under Variable Lighting and Pose
IEEE Transactions on Pattern Analysis and Machine Intelligence
Detecting Faces in Images: A Survey
IEEE Transactions on Pattern Analysis and Machine Intelligence
Statistical Learning of Multi-view Face Detection
ECCV '02 Proceedings of the 7th European Conference on Computer Vision-Part IV
Real-Time Face Detection on a Configurable Hardware System
FPL '00 Proceedings of the The Roadmap to Reconfigurable Computing, 10th International Workshop on Field-Programmable Logic and Applications
Robust Real-Time Face Detection
International Journal of Computer Vision
RECONFIG '05 Proceedings of the 2005 International Conference on Reconfigurable Computing and FPGAs (ReConFig'05) on Reconfigurable Computing and FPGAs
Fpga-based face detection system using Haar classifiers
Proceedings of the ACM/SIGDA international symposium on Field programmable gate arrays
Partially parallel architecture for AdaBoost-based detection with Haar-like features
IEEE Transactions on Circuits and Systems for Video Technology
Accelerating Viola-Jones Face Detection to FPGA-Level Using GPUs
FCCM '10 Proceedings of the 2010 18th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines
A novel hardware architecture for rapid object detection based on adaboost algorithm
ISVC'10 Proceedings of the 6th international conference on Advances in visual computing - Volume Part III
Hecto-Scale Frame Rate Face Detection System for SVGA Source on FPGA Board
FCCM '11 Proceedings of the 2011 IEEE 19th Annual International Symposium on Field-Programmable Custom Computing Machines
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This paper proposes techniques for face detection using Haar-like features as weak classifiers and gives the implementation details for an FPGA development board. We analyze and discuss the relation between the system computation cost and selection of the image scaling factor. Based on the empirical results of our previous work, we give a new method to select the stop threshold for the image reduction process, which reduces the total computation by half. We present and implement an improved integral image pipeline calculation design. We also provide a color image output mode to let our system enjoy more human-oriented design. Test results show that the system achieves real-time face detection speed (100fps) and a high face detection rate (87.2%) for an SVGA (600x800) video source. The low power consumption (3.5W) is another advantage over previous work.