The Design and Use of Steerable Filters
IEEE Transactions on Pattern Analysis and Machine Intelligence
The Transmogrifier-2: a 1 million gate rapid-prototyping system
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Rotation Invariant Neural Network-Based Face Detection
CVPR '98 Proceedings of the IEEE Computer Society Conference on Computer Vision and Pattern Recognition
Probabilistic Modeling of Local Appearance and Spatial Relationships for Object Recognition
CVPR '98 Proceedings of the IEEE Computer Society Conference on Computer Vision and Pattern Recognition
Probabilistic visual learning for object detection
ICCV '95 Proceedings of the Fifth International Conference on Computer Vision
Face Detection on Embedded Systems
ICESS '07 Proceedings of the 3rd international conference on Embedded Software and Systems
Square patch feature based face detection architecture for high resolution smart camera
Proceedings of the Fourth ACM/IEEE International Conference on Distributed Smart Cameras
Face detection system for SVGA source with hecto-scale frame rate on FPGA board
Microprocessors & Microsystems
A hardware architecture for real-time object detection using depth and edge information
ACM Transactions on Embedded Computing Systems (TECS)
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We present the design of a real-time face detection system and its implementation on a configurable hardware platform. The system works at 30 frames/second, which is the full frame rate of the video camera. A new detection algorithm was developed that is both robust and extremely efficient in hardware. The image is filtered and then passed through a neural-network-like face detector. Only simple operations are required to calculate the result. The detection accuracy achieved is comparable to other methods from the recent literature. The hardware face detection system is approximately 1000 times faster than the same algorithm running in software on a modern processor.