STATEMATE: A Working Environment for the Development of Complex Reactive Systems
IEEE Transactions on Software Engineering
Software synthesis for DSP using Ptolemy
Journal of VLSI Signal Processing Systems - Special issue on design environments for DSP
Hardware-software co-design of embedded systems: the POLIS approach
Hardware-software co-design of embedded systems: the POLIS approach
Fast prototyping: a system design flow for fast design, prototyping and efficient IP reuse
CODES '99 Proceedings of the seventh international workshop on Hardware/software codesign
Operating system based software generation for systems-on-chip
Proceedings of the 37th Annual Design Automation Conference
Proceedings of the 37th Annual Design Automation Conference
System Design with SystemC
Co-Synthesis of Hardware and Software for Digital Embedded Systems
Co-Synthesis of Hardware and Software for Digital Embedded Systems
Using MPI-2: Advanced Features of the Message Passing Interface
Using MPI-2: Advanced Features of the Message Passing Interface
DELTA '02 Proceedings of the The First IEEE International Workshop on Electronic Design, Test and Applications (DELTA '02)
MEMOCODE '03 Proceedings of the First ACM and IEEE International Conference on Formal Methods and Models for Co-Design
Embedded software generation from system level design languages
Proceedings of the 2004 Asia and South Pacific Design Automation Conference
Easy SoC Design with VCI SystemC Adapters
DSD '04 Proceedings of the Digital System Design, EUROMICRO Systems
Systemic Embedded Software Generation from SystemC
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Systematic Transaction Level Modeling of Embedded Systems with SystemC
Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Coprocessor design to support MPI primitives in configurable multiprocessors
Integration, the VLSI Journal
Embedded software development on top of transaction-level models
CODES+ISSS '07 Proceedings of the 5th IEEE/ACM international conference on Hardware/software codesign and system synthesis
| Hi-index | 0.00 |
Designers increasingly rely on reusing intellectual property (IP) and on raising the level of abstraction to respect system-on-chip (SoC) market characteristics. However, most hardware and embedded software codes are recoded manually from system level. This recoding step often results in new coding errors that must be identified and debugged. Thus, shorter time-to-market requires automation of the system synthesis from high-level specifications. In this paper, we propose a design flow intended to reduce the SoC design cost. This design flow unifies hardware and software using a single high-level language. It integrates hardware/software (HW/SW) generation tools and an automatic interface synthesis through a customlibrary of adapters. We have validated our interface synthesis approach on a hardware producer/consumer case study and on the design of a given software radiocommunication application.