High efficiency EBCOT with parallel coding architecture for JPEG2000

Authors:
Jen-Shiun Chiang;Chun-Hau Chang;Chang-Yo Hsieh;Chih-Hsien Hsia
Affiliations:
Department of Electrical Engineering, College of Engineering, Tamkang University, Tamsui, Taipei, Taiwan;Department of Electrical Engineering, College of Engineering, Tamkang University, Tamsui, Taipei, Taiwan;Department of Electrical Engineering, College of Engineering, Tamkang University, Tamsui, Taipei, Taiwan;Department of Electrical Engineering, College of Engineering, Tamkang University, Tamsui, Taipei, Taiwan
Venue:
EURASIP Journal on Applied Signal Processing
Year:
2006

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Abstract

This work presents a parallel context-modeling coding architecture and a matching arithmetic coder (MQ-coder) for the embedded block coding (EBCOT) unit of the JPEG2000 encoder. Tier-1 of the EBCOT consumes most of the computation time in a JPEG2000 encoding system. The proposed parallel architecture can increase the throughput rate of the context modeling. To match the high throughput rate of the parallel context-modeling architecture, an efficient pipelined architecture for context-based adaptive arithmetic encoder is proposed. This encoder of JPEG2000 can work at 180 MHz to encode one symbol each cycle. Compared with the previous context-modeling architectures, our parallel architectures can improve the throughput rate up to 25%.