Fault Tolerance Design in JPEG 2000 Image Compression System
IEEE Transactions on Dependable and Secure Computing
An improved bit-plane and pass dual parallel architecture for coefficient bit modeling in JPEG2000
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
FPGA implementation of a parallel EBCOT tier-1 encoder that preserves coding efficiency
GLSVLSI '06 Proceedings of the 16th ACM Great Lakes symposium on VLSI
High efficiency EBCOT with parallel coding architecture for JPEG2000
EURASIP Journal on Applied Signal Processing
Computing discrete transforms on the Cell Broadband Engine
Parallel Computing
Design and analysis of system on a chip encoder for JPEG2000
IEEE Transactions on Circuits and Systems for Video Technology
Runlength-based processing methods for low bit-depth images
IEEE Transactions on Image Processing
Compression quality prediction model for JPEG2000
IEEE Transactions on Image Processing
Scalable lossless high definition image coding on multicore platforms
EUC'07 Proceedings of the 2007 international conference on Embedded and ubiquitous computing
A high performance MQ encoder architecture in JPEG2000
Integration, the VLSI Journal
Architecture design of a high-performance dual-symbol binary arithmetic coder for JPEG2000
ICIP'09 Proceedings of the 16th IEEE international conference on Image processing
Memory-less bit-plane coder architecture for JPEG2000 with concurrent column-stripe coding
ICIP'09 Proceedings of the 16th IEEE international conference on Image processing
Efficient VLSI architecture for bit plane encoder of JPEG 2000
ICIP'09 Proceedings of the 16th IEEE international conference on Image processing
Dynamic reconfiguration in JPEG2000 hardware architecture
KES'11 Proceedings of the 15th international conference on Knowledge-based and intelligent information and engineering systems - Volume Part III
VLSI design of memory-efficient, high-speed baseline MQ coder for JPEG 2000
Integration, the VLSI Journal
FIDP: a novel architecture for lifting-based 2d DWT in JPEG2000
MMM'07 Proceedings of the 13th International conference on Multimedia Modeling - Volume Part II
ICIAP'05 Proceedings of the 13th international conference on Image Analysis and Processing
Poly-DWT: Polymorphic wavelet hardware support for dynamic image compression
ACM Transactions on Embedded Computing Systems (TECS)
JPEG-2000 compressed image retrieval using partial entropy decoding
MRCS'06 Proceedings of the 2006 international conference on Multimedia Content Representation, Classification and Security
Low GPU occupancy approach to fast arithmetic coding in JPEG2000
MEMICS'11 Proceedings of the 7th international conference on Mathematical and Engineering Methods in Computer Science
Texture-based medical image retrieval in compressed domain using compressive sensing
International Journal of Bioinformatics Research and Applications
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Embedded block coding with optimized truncation (EBCOT) is the most important technology in the latest image-coding standard, JPEG 2000. The hardware design of the block-coding engine in EBCOT is critical because the operations are bit-level processing and occupy more than half of the computation time of the whole compression process. A general purpose processor (GPP) is, therefore, very inefficient to process these operations. We present detailed analysis and dedicated hardware architecture of the block-coding engine to execute the EBCOT algorithm efficiently. The context formation process in EBCOT is analyzed to get an insight into the characteristics of the operation. A column-based architecture and two speed-up methods, sample skipping (SS) and group-of-column skipping (GOCS), for the context generation are then proposed. As for arithmetic encoder design, the pipeline and look-ahead techniques are used to speed up the processing. It is shown that about 60% of the processing time is reduced compared with sample-based straightforward implementation. A test chip is designed and the simulation results show that it can process 4.6 million pixels image within 1 s, corresponding to 2400 × 1800 image size, or CIF (352 × 288) 4 : 2 : 0 video sequence with 30 frames per second at 50-MHz working frequency.