Effective compiler support for predicated execution using the hyperblock
MICRO 25 Proceedings of the 25th annual international symposium on Microarchitecture
The multiflow trace scheduling compiler
The Journal of Supercomputing - Special issue on instruction-level parallelism
The superblock: an effective technique for VLIW and superscalar compilation
The Journal of Supercomputing - Special issue on instruction-level parallelism
Optimal code motion: theory and practice
ACM Transactions on Programming Languages and Systems (TOPLAS)
MediaBench: a tool for evaluating and synthesizing multimedia and communicatons systems
MICRO 30 Proceedings of the 30th annual ACM/IEEE international symposium on Microarchitecture
Design Challenges for New Application-Specific Processors
IEEE Design & Test
MICRO 15 Proceedings of the 15th annual workshop on Microprogramming
Efficient Backtracking Instruction Schedulers
PACT '00 Proceedings of the 2000 International Conference on Parallel Architectures and Compilation Techniques
Instruction buffering exploration for low energy embedded processors
Journal of Embedded Computing - Low-power Embedded Systems
Trace Scheduling: A Technique for Global Microcode Compaction
IEEE Transactions on Computers
Overview of the H.264/AVC video coding standard
IEEE Transactions on Circuits and Systems for Video Technology
A systematic approach to classify design-time global scheduling techniques
ACM Computing Surveys (CSUR)
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Delayed branching is a technique to alleviate branch hazards without expensive hardware branch prediction mechanisms. For VLIW processors with deep pipelines and many issue slots, the instruction scheduler faces the difficult problem of filling the many delay slots. This paper proposes two solutions: a code hoisting technique that produces more candidate operations to be put in the delay slots and an adapted backtracking instruction scheduler that is capable of efficiently placing these candidate operations in the delay slots. We have demonstrated that the two mechanisms work wellon various multimedia and SPECINT2000 benchmarks. The code hoisting technique reduces the schedule length of a traditional scheduler without backtracking by 18%. Using the backtracking scheduler, this amount increases to 24%.