Cache aware mapping of streaming applications on a multiprocessor system-on-chip
Proceedings of the conference on Design, automation and test in Europe
Reduction techniques for synchronous dataflow graphs
Proceedings of the 46th Annual Design Automation Conference
The earlier the better: a theory of timed actor interfaces
Proceedings of the 14th international conference on Hybrid systems: computation and control
Performance model checking scenario-aware dataflow
FORMATS'11 Proceedings of the 9th international conference on Formal modeling and analysis of timed systems
Managing latency in embedded streaming applications under hard-real-time scheduling
Proceedings of the eighth IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Mathematical formalisms for performance evaluation of networks-on-chip
ACM Computing Surveys (CSUR)
Model checking of scenario-aware dataflow with CADP
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
Partition configuration for real-time systems with dependencies
Proceedings of the 21st International conference on Real-Time Networks and Systems
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Synchronous Data Flow Graphs (SDFGs) are a very useful means for modeling and analyzing streaming applications. Some performance indicators, such as throughput, have been studied before. Although throughput is a very useful performance indicator for concurrent real-time applications, another important metric is latency. Especially for applications such as video conferencing, telephony and games, latency beyond a certain limit cannot be tolerated. This paper proposes an algorithm to determine the minimal achievable latency, providing an execution scheme for executing an SDFG with this latency. In addition, a heuristic is proposed for optimizing latency under a throughput constraint. Experimental results show that latency computations are efficient despite the theoretical complexity of the problem. Substantial latency improvements are obtained, of 24-54% on average for a synthetic benchmark of 900 models, and up to 37% for a benchmark of six real DSP and multimedia models. The heuristic for minimizing latency under a throughput constraint gives optimal latency and throughput results under a constraint of maximal throughput for all DSP and multimedia models, and for over 95% of the synthetic models.