Interconnections for parallel memories to unscramble p-ordered vectors.
Interconnections for parallel memories to unscramble p-ordered vectors.
ILLIAC IV Software and Application Programming
IEEE Transactions on Computers
Access and Alignment of Data in an Array Processor
IEEE Transactions on Computers
Iterative Arrays ror Radix Conversion
IEEE Transactions on Computers
The Organization and Use of Parallel Memories
IEEE Transactions on Computers
Computer organization for array processing
AFIPS '65 (Fall, part I) Proceedings of the November 30--December 1, 1965, fall joint computer conference, part I
An Efficient Memory System for Image Processing
IEEE Transactions on Computers
A 2D Addressing Mode for Multimedia Applications
Embedded Processor Design Challenges: Systems, Architectures, Modeling, and Simulation - SAMOS
Compiler-Based Performance Evaluation of an SIMD Processor with a Multi-Bank Memory Unit
Journal of Signal Processing Systems
| Hi-index | 14.99 |
An image can be represented by a two-dimensional array of "image points," which are sets of integers that each describe the color and intensity of a portion of the image. Image-processing operations require that an image or partial image be stored in a memory system that permits access to sequences of image points along any row or column of this image array and/or to the image points within small rectangular areas of the array. This paper describes a number of memory systems that permit access to 1 脳 pq,pq 脳 1 and/or p 脳 q subarrays of an image array, where p and q are design parameters.