General Shift-Register Sequences of Arbitrary Cycle Length
IEEE Transactions on Computers
A Method for the Design of Fault Detection Experiments
IEEE Transactions on Computers
Sequential Machines Capable of Fault Diagnosis
IEEE Transactions on Computers
On the design of easily testable sequential machines
SWAT '71 Proceedings of the 12th Annual Symposium on Switching and Automata Theory (swat 1971)
Fault detecting experiments for sequential circuits
SWCT '64 Proceedings of the 1964 Proceedings of the Fifth Annual Symposium on Switching Circuit Theory and Logical Design
On an extended threshold logic as a unit cell of array logics
AFIPS '72 (Fall, part I) Proceedings of the December 5-7, 1972, fall joint computer conference, part I
On Easily Diagnosable Sequential Machines
IEEE Transactions on Computers
IEEE Transactions on Computers
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An improved method for detection of faults in completely specified synchronous sequential machines is described. The technique is algorithmic, based on the concept of embedding the given binary machine into an easily testable R-valued machine. Heuristic optimization of additional permutation inputs is shown to lead to considerable reduction in the length of the fault sequence. A bound on the sequence length is derived, which in most cases is significantly lower than those of comparable methods.