Fault Detection of Binary Sequential Machines Using R-Valued Test Machines

  • Authors:
  • D. A. Sheppard;Z. G. Vranesic

  • Affiliations:
  • Cybernetic Services, Canadian National Railway;-

  • Venue:
  • IEEE Transactions on Computers
  • Year:
  • 1974

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Abstract

An improved method for detection of faults in completely specified synchronous sequential machines is described. The technique is algorithmic, based on the concept of embedding the given binary machine into an easily testable R-valued machine. Heuristic optimization of additional permutation inputs is shown to lead to considerable reduction in the length of the fault sequence. A bound on the sequence length is derived, which in most cases is significantly lower than those of comparable methods.