Sign/Logarithm Arithmetic for FFT Implementation

  • Authors:
  • E. E. , Jr. Swartzlander;D. V. Satish Chandra;H. T. , Jr. Nagle;S. A. Starks

  • Affiliations:
  • TRW Defense Systems Group;-;-;-

  • Venue:
  • IEEE Transactions on Computers
  • Year:
  • 1983

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Abstract

Sign/logarithm arithmetic is applicable to a variety of numerical applications where wide dynamic range and small wordsize are required. In this paper the basic sign/logarithm arithmetic operations required for signal processing (i.e., addition, subtraction, and multiplication) are reviewed, the computational errors are analyzed for FFT realization, and simulation results are presented which serve to verify the analysis. It is shown that the sign/logarithm approach provides improved arithmetic quantization error performance for a given word size over FFT's implemented with conventional fixed or floating point arithmetic, and that the sign/logarithm implementation is faster and less complex than conventional approaches.