High-speed dynamic programmable logic array chip
IBM Journal of Research and Development
An introduction to array logic
IBM Journal of Research and Development
MINI: a heuristic approach for logic minimization
IBM Journal of Research and Development
Generating Essential Primes for a Boolean Function with Multiple-Valued Inputs
IEEE Transactions on Computers
IEEE Transactions on Computers
Planar Multiple-Valued Decision Diagrams
ISMVL '95 Proceedings of the 25th International Symposium on Multiple-Valued Logic
IEEE Transactions on Computers
Input Variable Assignment and Output Phase Optimization of PLA's
IEEE Transactions on Computers
Analysis of a genetic programming algorithm for association studies
Proceedings of the 10th annual conference on Genetic and evolutionary computation
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Generalized Boolean functions are shown to be useful for the design of programmable logic arrays (PLA's), and the complexity of three types of PLA's is obtained by the theory of multiple- valued decomposition. A two-level PLA consists of an AND array and an OR array, and they are cascaded to perform a two-level AND-OR circuit. A PLA with decoders consists of decoders, an AND array, and an OR array