ACM Computing Surveys (CSUR)
The Design and Analysis of Computer Algorithms
The Design and Analysis of Computer Algorithms
Structure of Computers and Computations
Structure of Computers and Computations
First version of a data flow procedure language
Programming Symposium, Proceedings Colloque sur la Programmation
Processor-memory interconnections for multiprocessors
ISCA '79 Proceedings of the 6th annual symposium on Computer architecture
Interprocessor connections--capabilities, exploitation and effectiveness.
Interprocessor connections--capabilities, exploitation and effectiveness.
Control and data dependence for program transformations.
Control and data dependence for program transformations.
Optimization and interconnection complexity for: parallel processors, single-stage networks, and decision trees
Interconnections Between Processors and Memory Modules Using the Shuffle-Exchange Network
IEEE Transactions on Computers
The Theory Underlying the Partitioning of Permutation Networks
IEEE Transactions on Computers
Time and Parallel Processor Bounds for Fortran-Like Loops
IEEE Transactions on Computers
How to Make a Multiprocessor Computer That Correctly Executes Multiprocess Programs
IEEE Transactions on Computers
IEEE Transactions on Computers
Access and Alignment of Data in an Array Processor
IEEE Transactions on Computers
Optimal Scheduling Strategies in a Multiprocessor System
IEEE Transactions on Computers
On input/output speedup in tightly coupled multiprocessors
IEEE Transactions on Computers - The MIT Press scientific computation series
Compiler algorithms for synchronization
IEEE Transactions on Computers
Incorporating data flow ideas into von neumann processors for parallel execution
IEEE Transactions on Computers
Efficient field-sensitive pointer analysis of C
ACM Transactions on Programming Languages and Systems (TOPLAS)
Measuring the Parallelism Available for Very Long Instruction Word Architectures
IEEE Transactions on Computers
Compiler and hardware support for reducing the synchronization of speculative threads
ACM Transactions on Architecture and Code Optimization (TACO)
Microcode compaction: looking backward and looking forward
AFIPS '81 Proceedings of the May 4-7, 1981, national computer conference
Optimal loop parallelization for maximizing iteration-level parallelism
CASES '09 Proceedings of the 2009 international conference on Compilers, architecture, and synthesis for embedded systems
A profile-based tool for finding pipeline parallelism in sequential programs
Parallel Computing
Hardware support for multithreaded execution of loops with limited parallelism
PCI'05 Proceedings of the 10th Panhellenic conference on Advances in Informatics
Generalized index-set splitting
CC'05 Proceedings of the 14th international conference on Compiler Construction
Efficient parallel implementation of sequence analysis algorithms using a global address space model
Mathematical and Computer Modelling: An International Journal
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The purpose of this paper is to present some ideas on multiprocessor design and on automatic translation of sequential programs into parallel programs for multiprocessors. With respect to machine design, two subjects are discussed. First, a multiprocessor allowing parallelism at a very low level is sketched and then, a brief discussion on the interconnection network is presented.