A Two's Complement Array Multiplier Using True Values of the Operands

Authors:
N. Bandeira;K. Vaccaro;J. A. Howard
Affiliations:
Department of Electrical and Computer Engineering, University of California;-;-
Venue:
IEEE Transactions on Computers
Year:
1983

Citing 9
Cited 0

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Abstract

A new algorithm for implementing the two's complement multiplication of an m 脳 n bit number is described. By interpreting certain positive partial product bits as negative, a parallel array is developed which has the advantage of using only one type of adder cell. A comparison with the Pezaris and Baugh-Wooley arrays is presented, showing that the new array is as fast as the Pezaris array and uses less hardware than the Baugh-Wooley implementation.