An Information Theoretic Approach to Digital Fault Testing

Authors:
V. D. Agrawal
Affiliations:
Bell Laboratories
Venue:
IEEE Transactions on Computers
Year:
1981

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Abstract

The concepts of information theory are applied to the problem of testing digital circuits. By analyzing the information throughput of the circuit an expression for the probability of detecting a hardware fault is derived. Examples are given to illustrate an application of the present study in designing efficient pattern generators for testing.