An Expression Model for Extraction and Evaluation of Parallelism in Control Structures

Authors:
M. C. Wei;H. A. Sholl
Affiliations:
Bell Laboratories;-
Venue:
IEEE Transactions on Computers
Year:
1982

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Abstract

In the last few years advancements in VLSI technology have brought about practical research consideration of distributed computer system applications. A significant question is, "What potential improvements may be expected in an algorithm when its control structure is altered to maximize its internal parallelism?" This paper develops a general model for this area based on computation structures, defines algorithms to extract parallelism, and examines an experimental test set of programs in PL/1 to assess their potential performance improvement in expected execution time.