Processor Control Flow Monitoring Using Signatured Instruction Streams
IEEE Transactions on Computers
SAFECOMP '01 Proceedings of the 20th International Conference on Computer Safety, Reliability and Security
A Framework for Database Audit and Control Flow Checking for a Wireless Telephone Network Controller
DSN '01 Proceedings of the 2001 International Conference on Dependable Systems and Networks (formerly: FTCS)
Algebraic techniques for the optimization of control flow checking
FTCS '96 Proceedings of the The Twenty-Sixth Annual International Symposium on Fault-Tolerant Computing (FTCS '96)
Executable assertions and timed traces for on-line software error detection
FTCS '96 Proceedings of the The Twenty-Sixth Annual International Symposium on Fault-Tolerant Computing (FTCS '96)
IOLTW '00 Proceedings of the 6th IEEE International On-Line Testing Workshop (IOLTW)
A New Hybrid Fault Detection Technique for Systems-on-a-Chip
IEEE Transactions on Computers
Software-Based Adaptive and Concurrent Self-Testing in Programmable Network Interfaces
ICPADS '06 Proceedings of the 12th International Conference on Parallel and Distributed Systems - Volume 1
An optimized hybrid approach to provide fault detection and correction in SoCs
Proceedings of the 20th annual conference on Integrated circuits and systems design
Watchdog Processors and Structural Integrity Checking
IEEE Transactions on Computers
Software-Based Failure Detection and Recovery in Programmable Network Interfaces
IEEE Transactions on Parallel and Distributed Systems
Fault Tolerant External Memory Algorithms
WADS '09 Proceedings of the 11th International Symposium on Algorithms and Data Structures
Analysis of checksum-based execution schemes for pipelined processors
IPDPS'06 Proceedings of the 20th international conference on Parallel and distributed processing
Operating system support to detect application hangs
VECoS'08 Proceedings of the Second international conference on Verification and Evaluation of Computer and Communication Systems
Research: Signature-based method for run-time fault detection in communication protocols 1
Computer Communications
Time-Constraint-Aware Optimization of Assertions in Embedded Software
Journal of Electronic Testing: Theory and Applications
Priority queues resilient to memory faults
WADS'07 Proceedings of the 10th international conference on Algorithms and Data Structures
Hi-index | 0.01 |
A control flow checking scheme capable of detecting control flow errors of programs resulting from software coding errors, hardware malfunctions, or memory mutilation during the execution of the program is presented. In this approach, the program is partitioned into loop-free intervals and a database containing the path information in each of the loop-free intervals is derived from the detailed design. The path in each loop-free interval actually traversed at run time is recorded and then checked against the information provided in the database, and any discrepancy indicates an error. This approach is general, and can detect all uncompensated illegal branches. Any uncompensated error that occurs during the execution of a loop-free interval and manifests itself as a wrong branch within the loop-free interval or right after the completion of execution of the loop-free interval is also detectable. The approach can also be used to check the control flow in the testing phase of program development. The capabilities, limitations, implementation, and the overhead of using this approach are discussed.