Chemical mechanical planarization operation via dynamic programming

  • Authors:
  • Chia-Shui Lin;Yung-Chou Lee

  • Affiliations:
  • Department of Mechanical Engineering, National Chiao Tung University, Hsin-Chu 30050, Taiwan;Department of Electrical and Control Engineering, National Chiao Tung University, Hsin-Chu 30050, Taiwan

  • Venue:
  • Microelectronic Engineering
  • Year:
  • 2007

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Abstract

In this paper, the impact on non-planarization index by the down force and rotational speed during a SiO"2 or Cu CMP process was investigated. Since the magnitudes of down force and rotational speed have limits, we choose the dynamic programming approach because of its ability to achieve constrained optimization by the down force and rotational speed. The duration and the amount of input were computed based on the chemical mechanical polishing model by Luo and Dornfeld [J. Luo, D.A. Dornfeld, IEEE Trans. Semiconduct. Manufact. 14(2) (2001) 112-132.] when the other parameters were fixed. Experiments done for blanket wafers based on dynamic programming operation and conventional constant removal rate operation was compared with each other. The non-planarization index could be improved consistently by dynamic programming operation versus constant removal rate operation. The improvement ranges from 2% to 39% improvement over the base recipe of constant removal rate in all experiments as shown in Tables 3 and 6. The thickness removal error is consistently smaller by constant removal rate operation versus dynamic programming operation in all experiments as shown in Tables 3 and 6. To get the best performance of both planarization and thickness removal, it is recommended that planarization step and overpolish step in SiO"2 and Cu CMP should use different mode of operation, i.e., dynamic programming operation during planarization step for minimizing non-planarization index and constant removal rate operation during overpolish step for minimizing thickness removal error. The incremental time calculation for eliminating thickness removal error during overpolish step can be done using the thickness error and removal rate derived from Luos' removal rate model based on constant wafer pressure and platen speed at the end of planarization step. Our contribution is a new approach for CMP. Standard CMP uses constant removal rate operation in both planarization step and overpolish step. Our new approach uses dynamic programming operation during planarization step and constant removal rate operation during overpolish step.