New performance/power/area efficient, reliable full adder design
Proceedings of the 19th ACM Great Lakes symposium on VLSI
High-speed full adder based on minority function and bridge style for nanoscale
Integration, the VLSI Journal
Performance of CMOS and floating-gate full-adders circuits at subthreshold power supply
PATMOS'07 Proceedings of the 17th international conference on Integrated Circuit and System Design: power and timing modeling, optimization and simulation
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