Microcomputer systems: the 8086/8088 family: architecture, programming, and design
Microcomputer systems: the 8086/8088 family: architecture, programming, and design
On the use of registers vs. cache to minimize memory traffic
ISCA '86 Proceedings of the 13th annual international symposium on Computer architecture
Line (block) size choice for CPU cache memories
IEEE Transactions on Computers
Supercomputer architecture
Cache memory design: an art evolves
IEEE Spectrum
Accurate Low-Cost Methods for Performance Evaluation of Cache Memory Systems
IEEE Transactions on Computers
Performance evaluation of on-chip register and cache organizations
ISCA '88 Proceedings of the 15th Annual International Symposium on Computer architecture
Improving performance of small on-chip instruction caches
ISCA '89 Proceedings of the 16th annual international symposium on Computer architecture
ACM Computing Surveys (CSUR)
Transient behavior of cache memories
ACM Transactions on Computer Systems (TOCS)
Experimental evaluation of on-chip microprocessor cache memories
ISCA '84 Proceedings of the 11th annual international symposium on Computer architecture
Design of a Computer—The Control Data 6600
Design of a Computer—The Control Data 6600
Memory latency effects in decoupled architectures with a single data memory module
ISCA '92 Proceedings of the 19th annual international symposium on Computer architecture
CPU Cache Prefetching: Timing Evaluation of Hardware Implementations
IEEE Transactions on Computers
Memory Latency Effects in Decoupled Architectures
IEEE Transactions on Computers
| Hi-index | 0.01 |