Fine analog coding minimizes information transmission
Neural Networks
Computing and learning with dynamic synapses
Pulsed neural networks
Building an artificial brain using an FPGA based CAM-Brain machine
Applied Mathematics and Computation
Neuromorphic Systems: Engineering Silicon from Neurobiology
Neuromorphic Systems: Engineering Silicon from Neurobiology
Simulation of Spiking Neural Networks on Different Hardware Platforms
ICANN '97 Proceedings of the 7th International Conference on Artificial Neural Networks
Hardware Requirements for Spike-Processing Neural Networks
IWANN '96 Proceedings of the International Workshop on Artificial Neural Networks: From Natural to Artificial Neural Computation
RACER " A Rapid Prototyping Accelerator for Pulsed Neural Networks
FCCM '02 Proceedings of the 10th Annual IEEE Symposium on Field-Programmable Custom Computing Machines
A SIMD/Dataflow Architecture for a Neurocomputer for Spike-Processing Neural Networks (NESPINN)
MICRONEURO '96 Proceedings of the 5th International Conference on Microelectronics for Neural Networks and Fuzzy Systems
ICAL 2003 Proceedings of the eighth international conference on Artificial life
Hardware spiking neural network with run-time reconfigurable connectivity in
EH '03 Proceedings of the 2003 NASA/DoD Conference on Evolvable Hardware
From Wheels to Wings with Evolutionary Spiking Circuits
Artificial Life
Isolated word recognition with the liquid state machine: a case study
Information Processing Letters - Special issue on applications of spiking neural networks
FPGA Implementations of Neural Networks
FPGA Implementations of Neural Networks
Spiking neurons computing platform
IWANN'05 Proceedings of the 8th international conference on Artificial Neural Networks: computational Intelligence and Bioinspired Systems
A novel approach for the implementation of large scale spiking neural networks on FPGA hardware
IWANN'05 Proceedings of the 8th international conference on Artificial Neural Networks: computational Intelligence and Bioinspired Systems
Synaptic plasticity in spiking neural networks (SP2INN): a system approach
IEEE Transactions on Neural Networks
Which model to use for cortical spiking neurons?
IEEE Transactions on Neural Networks
Modular reservoir computing networks for imitation learning of multiple robot behaviors
CIRA'09 Proceedings of the 8th IEEE international conference on Computational intelligence in robotics and automation
Reservoir-based evolving spiking neural network for spatio-temporal pattern recognition
ICONIP'11 Proceedings of the 18th international conference on Neural Information Processing - Volume Part II
Continuous classification of spatio-temporal data streams using liquid state machines
ICONIP'12 Proceedings of the 19th international conference on Neural Information Processing - Volume Part IV
| Hi-index | 0.00 |
Hardware implementations of Spiking Neural Networks are numerous because they are well suited for implementation in digital and analog hardware, and outperform classic neural networks. This work presents an application driven digital hardware exploration where we implement real-time, isolated digit speech recognition using a Liquid State Machine. The Liquid State Machine is a recurrent neural network of spiking neurons where only the output layer is trained. First we test two existing hardware architectures which we improve and extend, but that appears to be too fast and thus area consuming for this application. Next, we present a scalable, serialized architecture that allows a very compact implementation of spiking neural networks that is still fast enough for real-time processing. All architectures support leaky integrate-and-fire membranes with exponential synaptic models. This work shows that there is actually a large hardware design space of Spiking Neural Network hardware that can be explored. Existing architectures have only spanned part of it.