A method for obtaining digital signatures and public-key cryptosystems
Communications of the ACM
A Computer Algorithm for Calculating the Product AB Modulo M
IEEE Transactions on Computers
A Canonical Bit-Sequential Multiplier
IEEE Transactions on Computers - Lecture notes in computer science Vol. 174
An 0(n) Parallel Multiplier with Bit-Sequential Input and Output
IEEE Transactions on Computers
VLSI Implementation of Modulo Multiplication Using Carry Free Addition
VLSID '97 Proceedings of the Tenth International Conference on VLSI Design: VLSI in Multimedia Applications
Hardware architectures for public key cryptography
Integration, the VLSI Journal
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This paper describes a method for computing a modular exponentiation, useful in performing the RSA Public Key algorithm, suitable for software or hardware implementation. The method uses conventional multiplication, followed by partial modular reduction based on sums of residues. We show that for a simple recursive system where the output of partial modular reduction is the input for the next multiplication, overflow presents few problems.