Video Codec Design: Developing Image and Video Compression Systems
Video Codec Design: Developing Image and Video Compression Systems
ASIP Design Methodologies: Survey and Issues
VLSID '01 Proceedings of the The 14th International Conference on VLSI Design (VLSID '01)
ASIP approach for implementation of H.264/AVC
ASP-DAC '06 Proceedings of the 2006 Asia and South Pacific Design Automation Conference
A fast VLSI architecture for full-search variable block size motion estimation in MPEG-4 AVC/H.264
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
Long-term memory motion-compensated prediction
IEEE Transactions on Circuits and Systems for Video Technology
p264: open platform for designing parallel H.264/AVC video encoders on multi-core systems
Proceedings of the 20th international workshop on Network and operating systems support for digital audio and video
Customizing wide-SIMD architectures for H.264
SAMOS'09 Proceedings of the 9th international conference on Systems, architectures, modeling and simulation
Porting a H264/AVC adaptive in loop deblocking filter to a TI DM6437EVM DSP
ICISP'12 Proceedings of the 5th international conference on Image and Signal Processing
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This paper presents an Application Specific Instruction Set Processor (ASIP) for implementation of H.264/AVC, called Video Specific Instruction-set Processor (VSIP). The proposed VSIP has novel instructions and optimized hardware architectures for specific applications, such as intra prediction, in-loop deblocking filter, integer transform, etc. Moreover, VSIP has coprocessors for computation intensive parts in video signal processing, such as inter prediction and entropy coding. The proposed VSIP has much smaller area and can dramatically reduce the number of memory access compared with commercial DSP chips, which result in low power consumption. Moreover, the proposed hardware accelerators have small size, consume low power consumption, and thus, they can support real-time video processing. VSIP has been thoroughly verified using an FPGA board having the Xilinx驴 Virtex II. VSIP can implement a real-time H.264/AVC decoder. The proposed VSIP is one of promising solutions for video signal processing.