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ISCA '89 Proceedings of the 16th annual international symposium on Computer architecture
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ACM Transactions on Design Automation of Electronic Systems (TODAES)
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ICS '98 Proceedings of the 12th international conference on Supercomputing
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DAC '82 Proceedings of the 19th Design Automation Conference
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PDP '95 Proceedings of the 3rd Euromicro Workshop on Parallel and Distributed Processing
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IEEE Transactions on Computers
Fpga-based prototype of a pram-on-chip processor
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ICCD'09 Proceedings of the 2009 IEEE international conference on Computer design
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NOCS '10 Proceedings of the 2010 Fourth ACM/IEEE International Symposium on Networks-on-Chip
Using simple abstraction to reinvent computing for parallelism
Communications of the ACM
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Explicit-multi-threading (XMT) is a parallel programming approach for exploiting on-chip parallelism. Its fine-grained single program multiple data (SPMD) programming model is suitable for many computing intensive applications. In this paper, we present a parallel gate level logic simulator implemented on an XMT platform and study its performance. Test results show potential for achieving more than a hundred-fold speedup over a serial implementation. This indicates an interesting possibility for a certain type of a single chip multicore architecture: use an existing easy-to-program API, such as VHDL or Verilog, for reduced application-software development time and better performance over serial performance-driven languages, such as C.