Feedback Control of Computing Systems
Feedback Control of Computing Systems
IBM Journal of Research and Development - IBM BladeCenter systems
ICAC '07 Proceedings of the Fourth International Conference on Autonomic Computing
System power management support in the IBM POWER6 microprocessor
IBM Journal of Research and Development
System power management support in the IBM POWER6 microprocessor
IBM Journal of Research and Development
Green data centers and hot chips
Proceedings of the 46th Annual Design Automation Conference
Power-performance management on an IBM POWER7 server
Proceedings of the 16th ACM/IEEE international symposium on Low power electronics and design
Power and thermal monitoring for the IBM system z10
IBM Journal of Research and Development
Power and energy-aware processor scheduling
Proceedings of the 2nd ACM/SPEC International Conference on Performance engineering
Adaptive energy-management features of the IBM POWER 7 chip
IBM Journal of Research and Development
BrownMap: enforcing power budget in shared data centers
Proceedings of the ACM/IFIP/USENIX 11th International Conference on Middleware
TL-plane-based multi-core energy-efficient real-time scheduling algorithm for sporadic tasks
ACM Transactions on Architecture and Code Optimization (TACO) - HIPEAC Papers
Does lean imply green?: a study of the power performance implications of Java runtime bloat
Proceedings of the 12th ACM SIGMETRICS/PERFORMANCE joint international conference on Measurement and Modeling of Computer Systems
Design for low power and power management in IBM Blue Gene/Q
IBM Journal of Research and Development
Runtime power reduction capability of the IBM POWER7+ chip
IBM Journal of Research and Development
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With increasing processor speed and density, denser system packaging, and other technology advances, system power and heat have become important design considerations. The introduction of new technology including denser circuits, improved lithography, and higher clock speeds means that power consumption and heat generation, which are already significant problems with older systems, are significantly greater with IBM POWER6™ processor-based designs, including both standalone servers and those implemented as blades for the IBM BladeCenter® product line. In response, IBM has developed the EnergyScale™ architecture, a system-level power management implementation for POWER6 processor-based machines. The EnergyScale architecture uses the basic power control facilities of the POWER6 chip, together with additional board-level hardware, firmware, and systems software, to provide a complete power and thermal management solution. The EnergyScale architecture is performance aware, taking into account the characteristics of the executing workload to ensure that it meets the goals specified by the user while reducing power consumption. This paper introduces the EnergyScale architecture and describes its implementation in two representative platform designs: an eight-way, rack-mounted machine and a server blade. The primary focus of this paper is on the algorithms and the firmware structure used in the EnergyScale architecture, although it also provides the system design considerations needed to support performance-aware power management. In addition, it describes the extensions and modifications to power management that are necessary to span the range of POWER6 processor-based system designs.