Sparse matrix computations on manycore GPU's

  • Authors:
  • Michael Garland

  • Affiliations:
  • NVIDIA Corporation, Santa Clara, CA

  • Venue:
  • Proceedings of the 45th annual Design Automation Conference
  • Year:
  • 2008

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Abstract

Modern microprocessors are becoming increasingly parallel devices, and GPUs are at the leading edge of this trend. Designing parallel algorithms for manycore chips like the GPU can present interesting challenges, particularly for computations on sparse data structures. One particularly common example is the collection of sparse matrix solvers and combinatorial graph algorithms that form the core of many physical simulation techniques. Although seemingly irregular, these operations can often be implemented with data parallel operations that map very well to massively parallel processors.