VirtualScan: Test Compression Technology Using Combinational Logic and One-Pass ATPG

Authors:
Laung-Terng Wang;Xiaoqing Wen;Shianling Wu;Zhigang Wang;Zhigang Jiang;Boryau Sheu;Xinli Gu
Affiliations:
SynTest Technologies;Kyushu Institute of Technology;SynTest Technologies;Cisco Systems;SynTest Technologies;SynTest Technologies;Cisco Systems
Venue:
IEEE Design & Test
Year:
2008

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Abstract

This article describes a test compression technology, called VirtualScan, which achieves scan test cost reduction by inserting a small combinational broadcaster and compactor into the original circuit under test (CUT). In addition, one-pass ATPG takes into account all constraints imposed by the VirtualScan compression architecture, and generates compression test patterns in the same manner as a conventional full-scan ATPG. The simplicity of the combinational-logic-based compression technology further allows for flexibility in addressing unknown (X) values and fault-aliasing effects, through either an enhanced ATPG algorithm or enhanced compactor logic.