A new march sequence to fit DDR SDRAM test in burst mode

Authors:
André Borin Soares;Alexsandro Cristovão Bonatto;Altamiro Amadeu Susin
Affiliations:
Universidade Federal do Rio Grande do Sul - UFRGS, Porto Alegre, Brazil;Universidade Federal do Rio Grande do Sul - UFRGS, Porto Alegre, Brazil;Universidade Federal do Rio Grande do Sul - UFRGS, Porto Alegre, Brazil
Venue:
Proceedings of the 21st annual symposium on Integrated circuits and system design
Year:
2008

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Abstract

This work is focused on DDR SDRAM test based on data word burst-oriented access. Existent March algorithms are not efficient to detect static unlinked faults (as Coupling and Address Decoder faults) in burst-mode operation. We propose to modify the March X algorithm to overcome its weakness. The proposed algorithm can reduce the total test time over 30% by using burst-mode data access in the DDR SDRAM test. The new algorithm has a length of (6 + BL)N, were BL is the burst-length used in data access. Results show that the proposed method detects errors produced by address decoder faults in word-oriented memories using burst mode operation, which is characteristic of DDR SDRAMs. We also propose to implement the new March algorithm into built-in self-test (BIST) modules for external memory testing.