Testing semiconductor memories: theory and practice
Testing semiconductor memories: theory and practice
Shmoo Plotting: The Black Art of IC Testing
IEEE Design & Test
Cell Signal Measurement for High-Density DRAMs
Proceedings of the IEEE International Test Conference
Industrial Evaluation of DRAM SIMM Tests
ITC '00 Proceedings of the 2000 IEEE International Test Conference
A new march sequence to fit DDR SDRAM test in burst mode
Proceedings of the 21st annual symposium on Integrated circuits and system design
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To improve yield and product quality, SDRAM manufacturers perform a variety of tests. A test sequence that incorporates retention tests, signal margin tests, and speed tests can help manufacturers find and repair weak memory cells.