March tests for word-oriented memories

Authors:
A. J. van de Goor;I. B. S. Tlili
Affiliations:
Delft University of Technology, Faculty of Information Technology and Systems, Section Computer Architecture Digital Technique, Mekelweg 4, 2628 CD Delft, The Netherlands;Delft University of Technology, Faculty of Information Technology and Systems, Section Computer Architecture Digital Technique, Mekelweg 4, 2628 CD Delft, The Netherlands
Venue:
Proceedings of the conference on Design, automation and test in Europe
Year:
1998

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Abstract

Most memory test algorithms are optimized tests for a particular memory technology and a particular set of fault models, under the assumption that the memory is bit-oriented; i.e., read and write operations affect only a single bit in the memory. Traditionally, word-oriented memories have been tested by repeated application of a test for bit-oriented memories whereby a different data background (which depends on the used intra-word fault model) is used during each iteration. This results in time inefficiencies and limited fault coverage. A new approach for testing word-oriented memories is presented, distinguishing between inter-word and intra-word faults and allowing for a systematic way of converting tests for bit-oriented memories to tests for word-oriented memories. The conversion consists of concatenating the bit-oriented test for inter-word faults with a test for intra-word faults. This approach results in more efficient tests with complete coverage of the targeted faults. Because most memories have an external data path which is wider than one bit, word-oriented memory tests are very important.