Testing semiconductor memories: theory and practice
Testing semiconductor memories: theory and practice
March tests for word-oriented memories
Proceedings of the conference on Design, automation and test in Europe
Design and Test of Large Embedded Memories: An Overview
IEEE Design & Test
Semiconductor manufacturing process monitoring using built-in self-test for embedded memories
ITC '98 Proceedings of the 1998 IEEE International Test Conference
Test and repair of large embedded DRAMs. I
Proceedings of the IEEE International Test Conference 2001
Embedded DRAM built in self test and methodology for test insertion
Proceedings of the IEEE International Test Conference 2001
A Scan-Bist Environment for Testing Embedded Memories
MTDT '02 Proceedings of the The 2002 IEEE International Workshop on Memory Technology, Design and Testing
Conversion of Small Functional Test Sets of Nonscan Blocks to Scan Patterns
ITC '00 Proceedings of the 2000 IEEE International Test Conference
Minimal Test for Coupling Faults in Word-Oriented Memories
Proceedings of the conference on Design, automation and test in Europe
Testing embedded memories in telecommunication systems
IEEE Communications Magazine
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A memory BIST enhancement, ESP. short for ExercisingSystem Paths, is described that allows the efficiency andfunctional capabilities of standard approaches whileaddressing two important problems. ConventionalMemory BIST techniques require MUXes at the inputs ofthe memory that allow for the inputs to be driven eitherby system signals or by test signals. These MUXes adddelays, in the system path going to the memory, whichoften has critical timing. ESP eliminates such delays byimplementing the MUXing function 'before' scan cells.ESP also uses scan cells to capture the memory output forfeeding back to the BIST controller. This output mayhave traveled through some logic before getting to therecording scan cells. By including the delays of thesystem input and output paths, ESP allows for verifyingthat the memory will work correctly as part of the systemrather than just as an isolated unit. Using ESP, a memoryBIST can catch transition and delay faults that areimpractical, or even impossible, to catch otherwise.Therefore, ESP can be useful for all memories but may becrucial for the memories which cannot tolerate theaddition of the MUX delay to functional paths.