Testing semiconductor memories: theory and practice
Testing semiconductor memories: theory and practice
On-Line Testing for VLSI—A Compendium of Approaches
Journal of Electronic Testing: Theory and Applications - Special issue on On-line testing
Self-checking and fault-tolerant digital design
Self-checking and fault-tolerant digital design
March tests for word-oriented memories
Proceedings of the conference on Design, automation and test in Europe
Using March Tests to Test SRAMs
IEEE Design & Test
Online BIST for Embedded Systems
IEEE Design & Test
An On-Line BISTed SRAM IP Core
ITC '99 Proceedings of the 1999 IEEE International Test Conference
A Dependable Autonomic Computing Environment for Self-Testing of Complex Heterogeneous Systems
Electronic Notes in Theoretical Computer Science (ENTCS)
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This article presents an online and offline built-in self-test architecture implemented as an SRAM intellectual-property core for telecommunication applications. The architecture combines fault-latency reduction, code-based fault detection, and architecture-based fault avoidance to meet reliability constraints.