An overview of deterministic functional RAM chip testing
ACM Computing Surveys (CSUR)
Testing semiconductor memories: theory and practice
Testing semiconductor memories: theory and practice
Fault tolerant and BIST design of a FIFO cell
EURO-DAC '96/EURO-VHDL '96 Proceedings of the conference on European design automation
Symmetric transparent BIST for RAMs
DATE '99 Proceedings of the conference on Design, automation and test in Europe
Testing SRAM-Based Content Addressable Memories
IEEE Transactions on Computers
Memory fault diagnosis by syndrome compression
Proceedings of the conference on Design, automation and test in Europe
A programmable built-in self-test core for embedded memories
ASP-DAC '00 Proceedings of the 2000 Asia and South Pacific Design Automation Conference
Processor-programmable memory BIST for bus-connected embedded memories
Proceedings of the 2001 Asia and South Pacific Design Automation Conference
An on-chip march pattern generator for testing embedded memory cores
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Diagnostic Data Compression Techniques for Embedded Memories with Built-In Self-Test
Journal of Electronic Testing: Theory and Applications
A Built-in Self-Test Scheme with Diagnostics Support for Embedded SRAM
Journal of Electronic Testing: Theory and Applications
Design of Cache Test Hardware on the HP PA8500
IEEE Design & Test
A Programmable BIST Core for Embedded DRAM
IEEE Design & Test
Design and Test of Large Embedded Memories: An Overview
IEEE Design & Test
Online and Offline BIST in IP-Core Design
IEEE Design & Test
Efficient Online and Offline Testing of Embedded DRAMs
IEEE Transactions on Computers
Transparent Word-Oriented Memory BIST Based on Symmetric March Algorithms
EDCC-3 Proceedings of the Third European Dependable Computing Conference on Dependable Computing
Pseudo-exhaustive word-oriented DRAM testing
EDTC '95 Proceedings of the 1995 European conference on Design and Test
Functional test for shifting-type FIFOs
EDTC '95 Proceedings of the 1995 European conference on Design and Test
RAM Testing Algorithm for Detection Linked Coupling Faults
EDTC '96 Proceedings of the 1996 European conference on Design and Test
Towards a Uniform Notation for Memory Tests
EDTC '96 Proceedings of the 1996 European conference on Design and Test
An Effective Distributed BIST Architecture for RAMs
ETW '00 Proceedings of the IEEE European Test Workshop
BIST for Embedded Word-Oriented DRAM
MTDT '98 Proceedings of the 1998 IEEE International Workshop on Memory Technology, Design and Testing
Functional Testing of Content-Addressable Memories
MTDT '98 Proceedings of the 1998 IEEE International Workshop on Memory Technology, Design and Testing
Assessing SRAM test coverage for sub-micron CMOS technologies
VTS '97 Proceedings of the 15th IEEE VLSI Test Symposium
A Framework to evaluate Test Tradeoffs in Embedded Core Based Systems-Case Study on TT's TMS320C27xx
ITC '00 Proceedings of the 2000 IEEE International Test Conference
March-Based RAM Diagnosis Algorithms for Stuck-At and Coupling Faults
ITC '01 Proceedings of the 2001 IEEE International Test Conference
A Highly-Efficient Transparent Online Memory Test
ITC '01 Proceedings of the 2001 IEEE International Test Conference
DESIGN OF CACHE TEST HARDWARE ON THE HP PA8500
ITC '97 Proceedings of the 1997 IEEE International Test Conference
Correlation of Logical Failures to a Suspect Process Step
ITC '99 Proceedings of the 1999 IEEE International Test Conference
Reducing Embedded SRAM Test Time under Redundancy Constraints
VTS '04 Proceedings of the 22nd IEEE VLSI Test Symposium
Efficient March Tests for a Reduced 3-Coupling and 4-Coupling Faults in Random-Access Memories
Journal of Electronic Testing: Theory and Applications
An Efficient Transparent Test Scheme for Embedded Word-Oriented Memories
Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Analysis of Dynamic Faults in Embedded-SRAMs: Implications for Memory Test
Journal of Electronic Testing: Theory and Applications
Proceedings of the 42nd annual Design Automation Conference
A simple diagnostic method for memory testing
ICECS'03 Proceedings of the 2nd WSEAS International Conference on Electronics, Control and Signal Processing
An accumulator-based compaction scheme for online BIST of RAMs
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
An Efficient Diagnosis Scheme for RAMs with Simple Functional Faults
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
Transparent memory testing for pattern sensitive faults
ITC'94 Proceedings of the 1994 international conference on Test
Generating march tests automatically
ITC'94 Proceedings of the 1994 international conference on Test
March test for static 3-coupling faults in random-access memories
DNCOCO'06 Proceedings of the 5th WSEAS international conference on Data networks, communications and computers
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A unified notation is presented for static random access memory (SRAM) fault models and fault tests for these models. The likelihood that the different types of faults will occur is demonstrated using inductive fault analysis and physical defect analysis. A set of march tests is discussed, together with methods to make composite tests for collections of fault tapes. Empirical results showing the fault coverage of the different test enable SRAM users to choose the fault models of interest as well as the test.