Testing semiconductor memories: theory and practice
Testing semiconductor memories: theory and practice
Functional Testing of Semiconductor Random Access Memories
ACM Computing Surveys (CSUR)
Using March Tests to Test SRAMs
IEEE Design & Test
Comments on "An Optimal Algorithm for Testing Stuck-at Faults in Random Access Memories"
IEEE Transactions on Computers
A March Test for Functional Faults in Semiconductor Random Access Memories
IEEE Transactions on Computers
Port Interference Faults in Two-Port Memories
ITC '99 Proceedings of the 1999 IEEE International Test Conference
SRAM delay fault modeling and test algorithm development
Proceedings of the 2004 Asia and South Pacific Design Automation Conference
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This paper proposes a realistic memory fault probability model which predicts the probabilities of memory fault classes for a given process technology. Physical defects in the memory array are classified into five functional fault classes, which are stuck-at, stuck-open, transition, coupling, and data retention faults. Finally, the memory fault coverages of the known memory test algorithms are evaluated based on their functional fault class coverages.