Functional and pattern sensitive fault testing algorithms for semiconductor random access memories.
Functional and pattern sensitive fault testing algorithms for semiconductor random access memories.
Computer
Detection oF Pattern-Sensitive Faults in Random-Access Memories
IEEE Transactions on Computers
Comments on "An Optimal Algorithm for Testing Stuck-at Faults in Random Access Memories"
IEEE Transactions on Computers
Fault Location in a Semiconductor Random-Access Memory Unit
IEEE Transactions on Computers
Efficient Algorithms for Testing Semiconductor Random-Access Memories
IEEE Transactions on Computers
An Optimal Algorithm for Testing Stuck-at Faults in Random Access Memories
IEEE Transactions on Computers
Test generation for VLSI chips with embedded memories
IBM Journal of Research and Development
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ITC '98 Proceedings of the 1998 IEEE International Test Conference
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MTDT '98 Proceedings of the 1998 IEEE International Workshop on Memory Technology, Design and Testing
Assessing SRAM test coverage for sub-micron CMOS technologies
VTS '97 Proceedings of the 15th IEEE VLSI Test Symposium
March-Based RAM Diagnosis Algorithms for Stuck-At and Coupling Faults
ITC '01 Proceedings of the 2001 IEEE International Test Conference
Test, diagnosis and fault simulation of embedded RAM modules in SRAM-based FPGAs
Microelectronic Engineering
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IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Fault modeling and test algorithm development for static random access memories
ITC'88 Proceedings of the 1988 international conference on Test: new frontiers in testing
Counterfeit Integrated Circuits: Detection, Avoidance, and the Challenges Ahead
Journal of Electronic Testing: Theory and Applications
A Comprehensive Framework for Counterfeit Defect Coverage Analysis and Detection Assessment
Journal of Electronic Testing: Theory and Applications
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A test procedure requiring 14 N operations to detect functional faults in semiconductor random access memories (RAM's) is given. It is shown that the proposed test procedure detects modeled types of functional faults if only one type of fault is present in the RAM under test. The test procedure given belongs to a class of tests called march tests. It is proved that any march test requires at least 14 N operations to detect the modeled faults. Next, groups of different types of functional faults that can be simultaneously present in the RAM under test and yet be detected by the proposed test procedure or a given enhanced test procedure (requiring 16 N operations) are studied.